1. Field of the Invention
The present invention relates to a method for analyzing and designing device a semiconductor device and a support apparatus for the same.
2. Description of the Related Art
A technique for analyzing characteristics of an electronic element such as a transistor has been known in “HiSIM2: Advanced MOSFET Model Valid For RF Circuit Simulation” (IEEE Trans. On Electron Devices, Vol. 53, No. 9, pp. 1994-2007, 2006) by M. Miura-Mattausch et al. In this related art 1, a technique is described for analyzing characteristics of a MOS transistor. FIG. 1 is a sectional view showing the structure of a MOS transistor of such model. A MOS transistor 30 as a model transistor has a source region 35, a drain region 33, a gate oxide film 32, a channel region 34 and a gate electrode 31. The source region 35 and the drain region 33 are provided in a surface region of a semiconductor substrate to put the channel region 34 between them. The gate oxide film 32 and the gate electrode 31 are laminated in this order to cover the channel region 34. According to the technique, channel impurity concentration distribution as concentration distribution of impurities in a depth direction in the channel region 34 is represented to be approximated to a constant value. A surface potential is found by solving Poisson equation in case of constantly approximated channel impurity concentration distribution using the surface potential as a variable. The found surface potential can be used for calculation of electric characteristics of the transistor. Here, the electric characteristics of the transistor are exemplified a gate capacitance Cgg-gate voltage Vg characteristic and a threshold voltage Vth-substrate voltage Vb characteristic (or a drain current Id-substrate voltage Vb characteristic). Methods for calculating these transistor characteristics are described in the above-mentioned related art 1 and “Unified complete MOSFET model for analysis of digital and analog circuits” (Proc. IEEE Trans. On Comput.-Aided Des./Int. Conf. Comput. Aided Des., vol. 15, no. 1, pp. 1-7, January 1996) by M. Miura-Mattausch, U. Feldmann, A. Rahm, M. Bollu, and D. Savignac as a related art 2. By using the transistor characteristics obtained according to these methods, analysis of a semiconductor element and design of a semiconductor circuit can be achieved.
As described above, according to the technique described in the above-mentioned related arts, a model in which channel impurity concentration distribution is approximated to a constant value is used. FIG. 2 is a graph showing an example of channel impurity concentration distribution of the MOS transistor in a depth direction. A vertical axis represents impurity concentration and a horizontal axis represents depth. In contrast that concentration is constant in an impurity concentration distribution 101 (solid line) of the above-mentioned model in the depth direction, concentration in an actual impurity concentration distribution 41 (broken line) varies depending on the depth. In other words, the impurity concentration distribution 101 of the model in the above-mentioned related arts is different from the actual impurity concentration distribution 41. For this reason, the transistor characteristics calculated using the surface potential based on the impurity concentration distribution of the model cannot represent actual transistor characteristics with high accuracy. As a result, an error is present in analysis of the semiconductor element and design of the semiconductor circuit.